? semiconductor components industries, llc, 2013 march, 2013 ? rev. 4 1 publication order number: ncp435/d NCP434, ncp435 2a ultra-small controlled load switch with auto-discharge path the NCP434 and ncp435 are a low ron mosfet controlled by external logic pin, allowing optimization of battery life, and portable device autonomy. indeed, due to a current consumption optimization with pmos structure, leakage currents are eliminated by isolating connected ic?s on the battery when not used. output discharge path is also embedded to eliminate residual voltages on the output (ncp435 only). available in wide input voltage range from 1.0 v to 4.0 v, and a very small 0.96 x 0.96 mm wlcsp4, 0.5 mm pitch. features ? 1 v ? 3.6 v operating range ? 29 m p mosfet at 3.3 v ? dc current up to 2 a ? output auto ? discharge (ncp435) ? active high en pin ? wlcsp4 0.96 x 0.96 mm ? these are pb ? free devices typical applications ? mobile phones ? tablets ? digital cameras ? gps ? portable devices figure 1. typical application circuit en enx dcdc converter 0 platform ic?n v+ ls or ldo ncp435 out a1 gnd b1 in a2 en b2 marking diagram http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information wlcsp4 case 567fg 1 xx = specific device code xx out gnd in en 12 a b (top view) pin diagram
NCP434, ncp435 http://onsemi.com 2 pin function description pin name pin number type description in a2 power load ? switch input voltage; connect a 1 f or greater ceramic capacitor from in to gnd as close as possible to the ic. gnd b1 power ground connection. en b2 input enable input, logic high turns on power switch. out a1 output load ? switch output; connect a 1 f ceramic capacitor from out to gnd as close as possible to the ic is recommended. block diagram en block control logic gate driver and soft start control in: pin a2 en: pin b2 out: pin a1 gnd: pin b1 optional: ncp435 figure 2. block diagram maximum ratings rating symbol value unit in, out, en, pins v en , v in , v out ? 0.3 to + 4.0 v from in to out pins: input/output v in , v out 0 to + 4.0 v maximum junction temperature t j ? 40 to + 125 c storage temperature range t stg ? 40 to + 150 c moisture sensitivity (note 1) msl level 1 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. moisture sensitivity level (msl): 1 per ipc/jedec standard: j ? std ? 020.
NCP434, ncp435 http://onsemi.com 3 operating conditions symbol parameter conditions min typ max unit v in operational power supply 1.0 3.6 v v en enable voltage 0 3.6 t a ambient temperature range ? 40 25 +85 c c in decoupling input capacitor 1 f c out decoupling output capacitor 1 f r ja thermal resistance junction ? to ? air wlcsp package (note 6) 100 c/w i out maximum dc current 2 a p d power dissipation rating (note 7) t a 25 c wlcsp package 0.5 w t a = 85 c wlcsp package 0.2 w 2. according to jedec standard jesd22 ? a108. 3. this device series contains esd protection and passes the following tests: 4. human body model (hbm) 4.0 kv per jedec standard: jesd22 ? a114 for all pins. machine model (mm) 250 v per jedec standard: jesd22 ? a115 for all pins. charge device model (cdm) 2.0 kv per jedec standard: jesd22 ? c101 for all pins. 5. latch up current maximum rating: 100 ma per jedec standard: jesd78 class ii. 6. the r ja is dependent of the pcb heat dissipation and thermal via. 7. the maximum power dissipation ( pd ) is given by the following formula: p d t jmax t a r ja
NCP434, ncp435 http://onsemi.com 4 electrical characteristics min and max limits apply for t a between ? 40 c to +85 c for vin between 1.0 v to 3.6 v (unless otherwise noted). typical values are referenced to t a = +25 c and v in = 3.3 v (unless otherwise noted). symbol parameter conditions min typ max unit power switch r ds(on) static drain ? source on ? state resistance v in = 4 v t a = 25 c, i = 200 ma (note 9) 27 30 m v in = 3.3 v t a = 25 c, i = 200 ma 29 34 v in = 3.3 v t a = 85 c 38 v in = 1.8 v t a = 25 c, i = 200 ma 43 52 v in = 1.2 v t a = 25 c, i = 200 ma 8 0 120 v in = 1.1 v t a = 25 c, i = 100 ma 110 r dis output discharge path en = low v in = 3.3 v, ncp435 only 65 90 t r output rise time v in = 3.3 v c load = 1 f, r load = 25 (note 8) 35 61 90 s t f output fall time v in = 3.3 v c load = 1 f, r load = 25 (note 8) 20 42 70 s t on gate turn on v in = 3.3 v gate turn on + output rise time 65 126 190 s t en enable time v in = 3.3 v from en low to high to v out = 10% of fully on 30 66 100 s v ih high ? level input voltage 0.9 v v il low ? level input voltage 0.5 v r en pull down resistor 5.1 7 m quiescent current i q current consumption v in = 3.3 v, en = low, no load 0.15 0.6 a v in = 3.3 v, en = high, no load 0.3 0.6 a 8. parameters are guaranteed for c load and r load connected to the out pin with respect to the ground 9. guaranteed by design and characterization, not production tested. timings t on t en t r t dis t f v out en v in t off figure 3. enable, rise and fall time
NCP434, ncp435 http://onsemi.com 5 typical characteristics figure 4. r ds(on) ( m ) vs. v in (v) from 1 v to 2. 6 v figure 5. r ds(on) ( m ) vs. v in (v) from 1 v to 4 v figure 6. r ds(on) ( m ) vs. i load (ma) figure 7. r ds(on) ( m ) vs. temperature ( c)
NCP434, ncp435 http://onsemi.com 6 figure 8. r ds(on) ( m ) vs. temperature ( c) at 1.2 v and 3.6 v figure 9. r ds(on) ( m ) vs. current (ma) figure 10. standby current ( a) versus v in (v), no load figure 11. standby current ( a) versus v in (v), v out short to gnd figure 12. quiescent current ( a) versus v in (v), no load
NCP434, ncp435 http://onsemi.com 7 figure 13. enable time, rise time, and ton time figure 14. disable time, fall time and toff time
NCP434, ncp435 http://onsemi.com 8 functional description overview the NCP434 ? ncp435 are high side p channel mosfet power distribution switch designed to isolate ics connected on the battery in order to save energy. the part can be turned on, with a range of battery from 1.0 v to 4 v. enable input enable pin is an active high. the path is opened when en pin is tied low (disable), forcing p mos switch off. the in/out path is activated with a minimum of v in of 1.0 v and en forced to high level. auto discharge (ncp435 only) nmos fet is placed between the output pin and gnd, in order to discharge the application capacitor connected on out pin. the auto ? discharge is activated when en pin is set to low level (disable state). the discharge path ( pull down nmos) stays activated as long as en pin is set at low level and v in > 1.0 v. in order to limit the current across the internal discharge nmosfet, the typical value is set at 65 . c in and c out capacitors in and out, 1 f, at least, capacitors must be placed as close as possible the part for stability improvement. application information power dissipation main contributor in term of junction temperature is the power dissipation of the power mosfet. assuming this, the power dissipation and the junction temperature in normal mode can be calculated with the following equations: p d r ds(on) i out 2 p d = power dissipation (w) r ds(on) = power mosfet on resistance ( ) i out = output current (a) t j r d r ja t a t j = junction temperature ( c) r ja = package thermal resistance ( c/w) t a = ambient temperature ( c) pcb recommendations the NCP434 ? ncp435 integrate an up to 2 a rated pmos fet, and the pcb design rules must be respected to properly evacuate the heat out of the silicon. by increasing pcb area, especially around in and out pins, the r ja of the package can be decreased, allowing higher power dissipation. figure 15. routing example 1 oz, 2 layers, 100 c/w
NCP434, ncp435 http://onsemi.com 9 figure 16. routing example 2 oz, 4 layers, 60 c/w example of application definition t j t a r ja p d r ja r ds(on) i 2 t j : junction temperature. t a : ambient temperature. r = thermal resistance between ic and air, through pcb. r ds(on) : intrinsic resistance of the ic mosfet. i: load dc current. taking into account of r obtain with: ? 1 oz, 2 layers: 100 c/w. at 2 a, 25 c ambient temperature, r ds(on) 44 m @ v in 1.8 v, the junction temperature will be: t j r ja p d 25 0.044 2 2 100 46 c taking into account of rt obtain with: ? 2 oz, 4 layers: 60 c/w. at 2 a, 25 c ambient temperature, r ds(on) 44 m @ v in 1.8 v, the junction temperature will be: t j t a r p d 25 0.044 2 2 60 35.5 c ordering information device marking package shipping ? NCP434fct2g aj wlcsp 0.96 x 0.96 mm (pb ? free) 3000 / tape & reel ncp435fct2g ah wlcsp 0.96 x 0.96 mm (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP434, ncp435 http://onsemi.com 10 package dimensions case 567fg issue o seating plane 0.05 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. 2x dim a min max 0.54 millimeters a1 d 0.96 bsc e b 0.29 0.34 e 0.50 bsc 0.63 d e a b pin a1 reference e a 0.05 b c 0.03 c 0.05 c 4x b 12 b a 0.05 c a a1 a2 c 0.22 0.28 0.96 bsc 0.05 c 2x top view side view bottom view note 3 e a2 0.33 ref pitch 0.25 4x dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.50 0.50 recommended a1 package outline pitch on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp435/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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